Reliability of CIS

September 25th, 2017

This morning, Sept. 25th at 11:30am the first set of CIS devices were stored at 85 deg.C/85% humidity to perform a very first reliability test.  I have no idea what is going to happen to the devices, but my intention is to tease those sensors till they finally will break.  At regular times the devices will be taken out of the climate chamber to fully test their characteristics.

All customers who bought the report “Reproducibility, Variability and Reliability of CMOS Image Sensors” will get automatically get the report on these extra tests.

Albert, 25-09-2017.

5th Harvest Imaging Forum : AGENDA update

September 21st, 2017

There is a tiny small update on the agenda of the 5th Harvest Imaging Forum.  One item is added.

Albert, 21-09-2017.

5th Harvest Imaging Forum on NOISE

September 16th, 2017

The 5th Harvest Imaging forum is scheduled for December 2017.  Two sessions were planned, namely on 7/8 Dec. and 11/12 Dec.  2017.  Both sessions will take place !!

I would like to bring to your attention that there will be NO 3rd session for the 2017 forum.  If you still are interested to register, please hurry up before the forum is sold out.

All info about the forum can be found here.

Albert, 16-09-2017.

40 YEAR AGO (2)

September 13th, 2017

 

Actually I am a bit too late to mention that exactly 40 years ago I got my MSc degree from the University of Leuven (Belgium).  As I already indicated in my blog of last year, in 1976 I started to work on my MSc thesis project, and the project finished mid-1977.  The topic of the MSc thesis project was the development of the hardware to drive and read a 256-pixel CCD line sensor.  An object was attached to a small rotating drum and was scanned by means of the CCD line array.  I learned a lot from this practical work, actually not surprising : if you do not know anything of a particular subject, everything you do is new and you constantly learn.

Once I obtained my MSc degree in July 1977, I got the opportunity to stay on-board of the CCD-group and to start a PhD project.  At that time to get funding for their projects, the PhD candidates had to go through a tough oral examination in front of a jury mainly composed out of professors of other (competing) universities.  To prepare myself for this examination, I started working in the CCD-group, headed by prof. Gilbert Declerck. I was involved, in support of another PhD candidate, in the research on the quality of silicon substrates to lower the dark current of the CCDs.  Cor Claeys was my coach during 3 months and he guided me through the clean room.  In this way I got familiar with the silicon processing in general and with the CCD process in particular.  I have seen thousands of silicon defects through the microscope, measured their length and counted the amount of dislocations, stacking faults and other beautiful artifacts.  I got familiar with Wright etch and Secco etch, as well with all kind of annealing steps.  But apparently it was the right preparation for the PhD examination because I could pass the examination, got the funding and could start my own PhD project : the implementation of Indium-Tin-Oxide transparent gate electrodes in the CCD process.  At that time the CCD pixels were based on MOS capacitors with a poly-Si gate electrode.  But the poly-Si did (and still does) absorb part of the incoming light.  To increase the light sensitivity of the pixels, the plan was to replace the poly-Si by a transparent conductive material, such as ITO.  Who could help me with this ?  Actually nobody in our department had any experience with this material and nobody in our department had any experience with the sputtering technique to deposit this material.  Enough challenges ahead for a more-than-interesting CCD-technology project !  The start of a new chapter in my life.

 

Albert, 13-09-2017.

First edition of the Harvest Imaging Newsletter published

September 5th, 2017

This afternoon I sent out the very first edition of the Harvest Imaging Newsletter (even with a typo in the title …. so it will become a collector’s item).

Many people have received a copy of the newsletter, but others who are not included on my mailing list will not have received a copy.  For those of you who want to be included in my mailing list for the newsletter, just drop me an e-mail and I will make sure you will get a copy (now and also in the future).

Regards, Albert.

First Report “Reproducibility, Variability and Reliability of CIS” is ready !

August 16th, 2017

I announced a while ago that Harvest Imaging started a new project on reproducibility, variability and reliability of CMOS image sensors.  This project will last for 5 years, and every year a new report will be compiled that contains all measurement results obtained in this project.  And now the very first report is ready !  It contains 175 pages, 118 figures and 98 tables.  More information about the content of the project can be found at:

www.harvestimaging.com/newproject.php

Find here below the table of content of the first report :

List of Figures                                                                                                                      

List of Tables                                                                                                                              

Introduction                                                                                                                            

Part 1 : Global Shutter CMOS Image Sensor                                                           

          Chapter 1 : Data Collection                                                                                       

                   Conversion Gain                                                                                           

                   Fixed-Pattern Noise in Dark or DSNU                                                     

                   Temporal Noise in Dark                                                                              

                   Fixed-Pattern Noise with Light (B, G, R) or PRNU                                 

                   Quantum Efficiency (B, G, R, n-IR)                                                             

                   Full Well Capacity or Saturation Level                                                            

                   Non-Linearity                                                                                                        

                   Maximum Signal-to-Noise Ratio                                                                     

                   Dynamic Range                                                                                                  

                   Dark Current                                                                                                         

                   Extra Measurements @ 0 s integration time                                                   

                            Fixed-Pattern Noise Analysis                                                                 

                            Temporal Noise Analysis                                                                        

                   Extra Measurements @ 1 s integration time                                                   

                            Fixed-Pattern Noise Analysis                                                                 

                            Temporal Noise Analysis                                                                          

 

          Chapter 2 : Reproducibility                                                                                      

 

          Chapter 3 : Variability                                                                                              

 

          Chapter 4 : Reliability                                                                                                  

 

Part 2 : Rolling Shutter CMOS Image Sensor                                                                   

 

          Chapter 5 : Data Collection                                                                                         

                   Conversion Gain                                                                                                 

                   Fixed-Pattern Noise in Dark or DSNU                                                           

                   Temporal Noise in Dark                                                                                   

                   Fixed-Pattern Noise with Light (B, G, R) or PRNU                                   

                   Quantum Efficiency (B, G, R, n-IR)                                                          

                   Full Well Capacity or Saturation Level                                                   

                   Non-Linearity                                                                                                  

                   Maximum Signal-to-Noise Ratio                                                                  

                   Dynamic Range                                                                                              

                   Dark Current                                                                                                   

                   Extra Measurements @ 0 s integration time                                              

                            Fixed-Pattern Noise Analysis                                                               

                            Temporal Noise Analysis                                                                       

                   Extra Measurements @ 1 s integration time                                                 

                            Fixed-Pattern Noise Analysis                                                              

                            Temporal Noise Analysis                                                                       

 

          Chapter 6 : Reproducibility                                                                                    

 

          Chapter 7 : Variability                                                                                             

 

          Chapter 8 : Reliability                                                                                                

 

Albert, 16-08-2017.

5th Harvest Imaging Forum : Registration OPEN !

June 6th, 2017

I am happy to announce that the registration for the upcoming Harvest Imaging Forum is open.  Prof. dr. Christian ENZ of EPFL (Switzerland) will entertain us for two days with the topic of NOISE in Analog Devices and Circuits.  More information about the agenda of the forum and about possible registration can be found HERE.

Albert, 06-06-2017.

International Image Sensor Workshop (4)

June 2nd, 2017

Some thought about day 4 :

  • a student presentation from Shizuoka university about a fully-depleted SOI based detector : the conversion part is located in the base substrate, while the circuitry is located in the thin top layer silicon of the SOI.  Very clever solution for this BSI sensor, although that some parameters still have some room for improvement,
  • a stacked device from JPL with their delta-doped interface layer.  The latter gives a highly doped, ultra-thin top layer without any damage to the structure, resulting in a very stable device, even after radiation,
  • Invisage presented a paper about their quantum dot based image sensor.  Finally some numbers were shown, the devices are characterized by kTC noise and (still) a relative large dark current (600 electrons/pixel/sec at 60 deg.C for a 1.5 um pixel pitch).  A very interesting feature of these devices is the fact that they can detect electrons OR holes, depending on the polarity of the bias voltage,
  • Another quantum dot paper from imec, based on 6 nm PbS dots in a 3-layer film of a total thickness of 150 nm.  The authors showed some preliminary results, a 2D sensor is not yet realized.  Come and see at IISW2019,
  • ISAE illustrated their further work on radiation hardening of CMOS image sensors.  In conclusion : a pMOS degrades faster than an nMOS, a PPD is not suited for Grad radiation tolerance, shallow diodes can withstand radiation better than deeper diodes and a 1.8 V architecture is the best if radiation hardness is concerned.
  • Tower had a paper about different PD structures to enhance near-IR detection.  4 PD were compared : a 3 um deep diode, a 6 um deep diode, a 9 um high-resistivity and a 12 um high-resistivity substrate.  All results reported were done on a GS 2.8 um pixel.  Accutally all variations still suffer from optical cross-talk.  For that reason, in Tower’s 65 nm process, a stacked PD will be introduced : two structures on top of each other made in a double epi-layer and with an implanted isolation.
  • Canon showed an improved version of their sensor that was already introduced at IEDM 2016 and ISSCC 2017.  A lightpipe and a double micro-lens were added over previous versions.  130 nm CIS process with 1P4M + LS, 3.4 um pixel, 79 dB dynamic range, 1.8 electrons of noise and PLS of -89 dB.
  • A very similar paper came from TPSCo about double micro-lenses, but on a pixel of 2.8 um.  The presenter claimed that in the near future also light pipes will be added and that a PLS of 83.5 dB can be obtained.
  • IMEC opened the GS session with a fully depleted device with 52 um pixels and with a charge transfer of 6 ns.
  • A BSI imager with GS from ON semi, most probably with a storage node in the charge domain (a pixel architecture was not disclosed), and with a shielding of the storage node by means of implantations.
  • ams (formerly CMOSIS) closed the workshop with a large area device having GS pixels based on their in-pixel voltage storage nodes.  47 Mpixels, 30 fps, 90/65 nm, only 2 layers of metal resulting in a total optical stack of 1.5 um, DTI and stitched in 1 direction.  Angular dependency of the light sensitivity was shown as well as angular dependency of the PLS (have never seen this before at a conference or workshop).

Albert, 02-06-2017.

International Image Sensor Workshop (3)

June 1st, 2017

Some thoughts about day 3 :

  • Several ADC papers were presented, with a common motivation : hybrid ADC solution for the image sensor application : Tokyo Institute of Technology highlighted a SAR in combination with a delta-sigma ADC (without indicating the number of bits in their paper), University of Oxford combined a single-slope with a TDC solution to realize a fast 12-bit ADC, Teledyne DALSA presented a fast SS-ADC used in their TDI-CCD/CMOS combination, Teledyne Anafocus came up with a column-parallel solution based on two-stage oversampled converters, and finally Olympus presented a SS-ADC with a operation-period-reduced TDC to increase the conversion speed and keep the power consumption low.
  • In between all those ADC papers, Delft University showed an on-chip digital calibration technique to correct the non-linearity of the pixels.  Actually this calibration technique is based on “shaping” the ramp of the SS-ADC, so also this paper was referring to ADC related stuff.
  • In the final session of day 3 a collection of papers was presented on various topics.  JPL gave an overview and update of their latest image sensor work, university of Toronto talked about a CMOS architecture fo a so-called primal-dual coding with on-chip programmable masking techniques for the pixels (pixels are based on a good-old photogate), Sony re-presented their ISSCC paper on a stacked device with a very powerful 140 GOPS column parallel processing capability, and the session was closed by IMEC reporting a high-speed BSI version of their TDI CCD-CMOS combination.  Quite a bit of CTI-, noise-, MTF- and dark-current measurement data was shown in this last presentation with the comment of the speaker that there is still room to improve considering the performance of the device.

Albert, 01-06-2017.

International Image Sensor Workshop (2)

May 31st, 2017

Some thoughts about day 2 :

  • two back-to-back papers of Dartmouth about the QIS.  The first paper described basically the work on a single Jot with reset-gate less pixel, with a tapered reset gate, with a JFET readout and with a buried channel readout, all fabricated in a stacked 45nm/65 nm BSI TSMC technology.  Some numbers : 1.1 um pixel pitch, 540 uV/electron conversion gain, best noise as low as 0.22 electrons.   The second paper talked about the integration of the Jots in an array.  The testdevice has 1 Mpixel.   The promise made : by 2019 they will show 100 Mpixel.
  • the largest SPAD array ever was reported by EPFL, while the smallest SPADs came from University of Edinburgh.
  • also the university of Edinburgh reported about the transformation of QIS bitplanes to compensate motion.  The paper was supported by spectucular images,
  • Delft University presented a SPAD integrated on a flexible substrate with the capability of being sensitive from both sides of the device,
  • a dedicated ToF session opened with a paper from Shizuoka University illustrating a 3-tap ToF sensor (normally 2-tap or 4-tap devices are shown),  also 3-taps in a paper of the University of Lyon in cooperation with ST and CEA-Leti.  The latter was made on a “doping-profile-controlled” epi-layer to enhance the transport of the electrons to the collection nodes,
  • several years ago Samsung presented material on RGB-Z sensors, also at the workshop they showed an alternative concept for a RGB-Z device based on structured light with a green laser beam.  The device included a simple trick to cope with a large amount of background light : using the FD-RST combination as a logarithmic pixel.
  • HDR was, is and remains a hot topic.  Apparently everyone is seeking a solution that does not suffer from motion artefacts.  This can be done by “playing” around with the gain of the output structure by adding an extra capacitor.  This idea can be found in the work of Brillnics (3 different conversion gains, 87 dB, 3.0 um pixel), ON Semi (extra in-pixel capacitor like LOFIC, 98 dB, 6 um pixel pitch), Caeleste (extra in-pixel capacitor in combination with extra gain in the columns, 92 dB, 12 um), ON semi (multiple reads of the PPD with storage on an external capacitor, 140 dB, 3 um pixel pitch), OmniVision (extra in-pixel capacitor, 120 dB, 2.8 um pixel pitch).  Apparently once the sensor does better than 120 dB, the sensor is no longer the limiting factor as far as DR is concerned,
  • “out-of-the-box” is the solution proposed by ST : detection, collection and readout of electrons as well as holes.  The electrons are collected in the classical way (FWCe = 33000), the holes are stored in the capacitances of the DTIs which has a very large total storage capacitance (FWCh = 750,000).  Result : 116 dB dynamic range in a 3.2 um pixel pitch,
  • between all the HDR stuff, Delft University presented a 0.5 electron noise device with correlated double sampling in the charge domain.  A conversion gain of over 1.5 mV/electron was reported measured on a device made in a standard 0.18 um CIS process,
  • Ritsumeikan University calculated the temporal resolution limit of silicon imagers.  The result is around 11 ps.  So still a long way to go before we reach the maximum frame rate corresponding to this limit, being 90 Gfps,
  • high-speed devices were presented by Tohoku University (based on burst mode with analog memories outside the active imaging area, 10 Mfps, 960 frames), Vrije Universiteit Brussel (burst mode based on in-pixel storage, 20 Mfps, 108 frames), Tokyo University ( 0.64 usec row-time), and AGH University of Krakow (70 kfps for a device with 75 um pixel pitch intended for XRD applications).

Sorry for any typos or for any missing papers, also day 2 had again a lot of information : 2 invited papers and 23 submitted papers !

Albert, 31-05-2017.