International Solid-State Circuits Conference 2013 (4)

“A 3D vision 2.1 Mpixels image sensor for single-lens camera systems”, by S.Koyama of Panasonic.  The basic idea is to perform depth sensing by means of a “standard” 2D image sensor.  To do so, every pair of horizontal pixels is provided with one lenticular lens (cylindric).  This is resulting in the structure that one pixel of the pair “looks” to the left incoming beams (= left eye), and the other pixel of the pair “looks” to the right incoming beams (= right eye).  Based on the difference in information, the depth can be measured.  Simple idea, but a few important items need to reported :

–       The standard Bayer pattern is no longer applicable, because the two paired pixels need to have the same color.  So the CFA is a kind of Bayer pattern that is stretched in horizontal direction across two pixels,

–       The real difficult part of this concept is located in the digital micro-lenses that are located on every individual pixel and that are located between the silicon and the lenticular lens.  These digital micro-lenses are/were described elsewhere, but it looks that they are key to this idea, especially for the pixels that are situated towards the edges of the image sensor,

–       The method works only with low F numbers for the main lens (e.g. F1.4).

Measurement results show that the “left eye” and the “right eye” really can discriminate between various angles of incidence.  Their peak sensitivity is 2 times larger than a classical pixel, basically showing that 3D is working very efficiently (2 times is the best you can get because you bring all information from 2 pixels into a single pixel).

“A 187.5 uVrms read noise 51 mW 1.4 Mpixel CMOS image sensor with PMOSCAP column CDS and 10b self-differential offset-cancelled pipeline SAR-ADC”, by J. Deguchi (Toshiba).  By using pMOS capacitors in the columns to perform CDS, 50 % of the area can be saved because of the high intrinsic capacitance value of the pMOS.  The capacitors were not only applied in the CDS circuitry but also elsewhere in the controller, resulting in a lower area and a power reduction of 40 %.  A similar story for the CDAC in the ADC : a size of 50 % and a power of only 20 % compared to previously reported devices.  Besides all this good news, a noise level of 4.5 electrons was shown (take into account that the conversion gain is “only” 41.8 uV/electron).

Albert, 24-01-2013.


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