Report : CMOS Detector Workshop, Toulouse, Dec. 7th, 2011

Digital Focal Plane arrays for Cooled Infrared Detectors – SOFRADIR

          It was emphasised that column level ADCs are best to achieve good resolution and power consumption.

          The 1st generation designed imager in 0.35um technology had a pixel pitch of 15um, 640×512 pixel array, SNR of 77.3dB and a power consumption of 70mW at 80Hz.

          The ADC pitch is 50um, 15-bit resolution and consumes 70uW/ADC.

          2nd generation imager was claimed to perform better but no specifications were provided.

IR Sensor for space applications at Selex Galileo – Selex Galileo

          Design of Mercury Cadmium Telluride (MCT) avalanche photodiode was presented.

          The desired specifications are a noise floor of less than 1.5e-, operating temperature of greater than 200K, QE greater than 70% and a bandwidth of greater than 20MHz.

          The devices showed no major change in dark current after radiation.

          The devices are sensitive to 2.051um wavelength but are also suitable to work between 1.3-2.2um.

          MCT-APD wavefront sensor was designed. It was mention that the avalanche gain does not affect non-uniformity and depends only on voltage biasing and alloy composition. A 1.75e-/pixel readout noise with an APD gain of 33 was reported. The noise increased to 2.8e- when operated at 5MHz speed with the APD gain of 33.

Innovative ROIC for very low flux sensors – SOFRADIR

          The gate capacitance of source follower helps in noise reduction and a 4fF capacitor based readout has been developed and reported. The innovative designs were claimed but not shown!

          For a 18um pixel pitch a total conversion capacitor of 27.3fF and for a 15um pixel pitch a conversion capacitor of 20fF was reported. It was claimed that these conversion capacitors are the state-of-the-art. The author referred to their paper to be published in Journal of Electronic Material, June 2012 for more details.

          Other performance parameter mentioned were a conversion gain of 5uV/e-, dark current of 0.06e-/s, read noise of less than 6e-, leakage current of 0.002e-/s, power consumption of 360uW/100KHz, operating temperature of 70K and operated in rolling shutter mode.

          PTC was not used to derive the conversion capacitors rather CNES developed in house capacitance measurement tools that were used. It was pointed out by the audience that the inter-pixel capacitance will affect the total capacitor measured which was not taken into consideration.

Specifications of an Analog-to-Digital Converter for uncooled infrared readout circuits – ULIS

          NETD (noise equivalent temperature difference) which is equivalent to SNR is used to characterize the sensor behaviour.

          Non-linearity versus temperature behaviour was shown to be around 1%. Different gain and offset correction were applied for each pixel.

          The desired ADC specifications mentioned were a resolution of 14bits, ENOB of 12.5bits, Sampling frequency greater than 7MHz for QVGA and greater than 20MHz for VGA configuration, INL less than 2LSB and the power consumption of less than 80mW for QVGA and less than 100mW for VGA with a supply voltage of 1.8V.

          The measured ENOB was 12.8, SNR of 79dB, DNL of 0.76, INL of 4.93, THD of -72dB and a power consumption of 95mW at an operating speed of 5MHz and a supply voltage of 5V was presented.

 

CTIA circuit for low light level imaging with InGaAs detector. Demonstration with a 15um pitch VGA format.

          Advantages of InGaAs SWIR detectors were presented.

          A CMOS imager with a CTIA pixel was described. The tricks to optimize the noise performance of the CTIA amplifiers were mentioned. Limiting the bandwidth by adding an output load helps in noise reduction.

          The image sensor was designed in 0.18um technology and had a resolution of 640×512, pixel pitch of 15um, can be operated at 120fps or 60fps in rolling shutter mode, dual gain for day/night operations and the reported noise without CDS was 130e- (Integration time of 8ms, Temp. Of 30C) while with CDS it was 90e-. The dark current was reported to be less than 20nA/cm2 and was claimed to be the state-of-the-art (the integration time used was only 8.3ms). The input referred noise with CDS was mentioned to be in between 30-40e- depending on photodiode bias voltage.

          The dual gain mode was used. In high gain mode a conversion gain of 17.6uV/e-, full well of 105Ke-, read noise of 30e- with CDS and a DR of 71dB was reported. While in low gain mode the conversion gain achieve was 1.9uV/e-, full well of 1Me-, read noise of 80e- with CDS and a DR of 82dB was reported.

Optimization of perfomence of Backthinned CMOS devices – e2v

          To improve the red QE, thick epitaxial layer is needed.

          MTF was defined as the ratio of undepleted thickness to the pixel pitch.

          Standard 12um thick epi was thinned to 7um, which 18um thick epi was thinned to 11um.

          A responsivity of 39uV/e-, noise of 5-20e-, peak signal of 49ke-, QE of greater than 80% for spectral range of 450-750nm, dark current of nearly 60e-/pixel/sec at 313K was reported for a pixel pitch of 7um operating at 7.7MHz. A PRNU was mentioned to be good on the back thinned sensor especially for shorter wavelengths.

          It was mentioned that the shape of the photodiode shows differences in the horizontal and vertical MTF, not significant though.

          Further it was mentioned that if microlenses are used together with frontside pixel then back thinned provides limited advantages in terms of QE. Further thinning too much would pose wire bonding problems as the metal would become too thin and would be prone to be displaced or damaged.

          In the discussion it was also mentioned that smaller PPDs have small depletion region and thus shows poor MTF.

Results of the second generation hybrid backside illuminated imagers and an introduction to other high-end imager development at imec. –imec

          The first generation hyper spectral imagers had a QE of greater than 80% in the spectral range of 400-800nm, however they suffered from high cross talks.

          In the second generation hybrid imagers, an optimized 2 step graded EPI for built-in electric field was used. CuSn bump technology was used instead of Indium bonds. The functional bonds were reported to have a yield of 99.99%. The trenching was improved too. This all resulted in good QE and cross talk values. Further it was mentioned that these devices were radiation hard designs.

          The imager was designed in 0.13um imec CMOS process. The pixel pitch as 2.5um, resolution of 8Mpixel, 12 bit sigma-delta ADC operating at 60fps, imager size of 14x13mm taped out and expected to be characterized early next year.

CMOS image sensor pixel with 0.5 noise electrons RMS – CAELESTE

          The RTS noise and 1/f noise is reduced by cycling the MOSFET between inversion and accumulation to produced un-correlated noise which when sampled become “white”.

          A CTIA configuration was used and a very high conversion gain of nearly 1000uV/e- was reported.

          When the cycling of the MOSFET was not used a 2e- readout noise was obtained. While when the cycling was performed a 0.5e- readout noise at dark was measured. However it mentioned that the measurements showed variance and it might be due to the CVF. The research institutes and PhDs were invited to do an independent confirmation!

Radiation effects on CMOS image sensor – ISAE

          Discrimination of TID induced DC-RTS and DDD (displacement damage dose) induced DC-RST was done.

          Meta-stable generation centers in PPD causes signal variations.

          DC-RTS increases proportionally to TID.

          It was mentioned that bulk defects located in the space charge region responsible for DDD induced DC-RTS while interface states located in the trench oxide are mainly responsible for TID induced DC-RTS.

          The Co60 used for radiation measurements would also produce point defects which can generate undesired RTS. This was mentioned in the discussion.

A round table discussion was also held on “Is there a place for a common strategy for the end users” and it was pointed out by an ESA representative that CMOS cannot compete with CCD in low volume space applications as long as the foundries and companies working on CMOS don’t discuss or reveal more information. Information sharing would be keen to see the CMOS image sensors being actively pursued in low volume applications.

Written by M. Sarkar.  Thanks to Mukul for the effort of putting the 2 reports together on such a short notice and for sharing the reports with the imaging community.

Albert.

8-12-2011.

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