In this short blog I would like to report on (what were for me !!) the highlights of the workshop entitled : “CMOS Detectors for High Performance Applications”, organized by Alex Materne (CNES), Oliver Saint-Pe (Astrium) and Christophe Renard (Thales Alenia Space). Unfortunately I could not attend all presentations, so there might have been more important things presented than just shown over here. Sorry to the presenters that I missed.
– P. Robert (ULIS) explained how to increase the dynamic range of infra-red imagers by implementing extra capacitance in the column circuitry,
– B. Dupont (Caeleste) showed a hybrid photon counting sensor based on SPADs,
– B. Fowler (Fairchild Imaging) had another talk about their 5.5 Mpixel low-noise sensor. New to me was the availability of the colour version of this sensor, as well as the back-side thinned version. The combination of colour and back-side illumination will not be offered. In the same talk a rad-hardness of 30 Mrad was mentioned. Seems extremely high to me, but then the discussion popped up how the rad-hardness is defined ? No data was given about the performance of the device in global shutter mode. We have to wait till the upcoming SPIE conference in January 2010.
– T. Baechler (CSEM) presented their work on in-pixel amplification with p-type transistors configured as a regulated cascade in the columns. Cleaver idea, but at this moment no measurements are available. An interesting model was presented to show the importance of the dark current if single photon detection is needed.
– G. Lepage (CMOSIS) talked about the TDI option in CMOS, and how his project evolved from an analogue storage towards a digital storage on-chip for the intermediate data of the TDI.
– J. Bosiers (DALSA) showed that a front-side illuminated CMOS imager can be light sensitive till 250 nm, at least if the appropriate measures are taken in the technology,
– J. Pratlong (E2V) presented a large pinned (?) photodiode of 24 um x 24 um with the readout circuitry nicely placed in the middle of the diode. Unfortunately no real details of the lay-out were shown, it would be of great interest to see how a large conversion gain (90 uV/e-) can be obtained by such a structure. Image lag of 5 electrons are reported, this seems a very good value for such a large pixel.
– B. Cremers (Cypress) reported about an imager with a partially pinned photodiode. Interesting to notice is the fact that the author talked about a couple of artifacts of the devices. This is not that often the case that companies report about issues.
– A. Peizerat (CEA) gave an interesting overview of requirements and options for ADCs in CMOS image sensors (die-level, column-level and pixel-level).
– I. Djite (ISAE) talked about MTF simulation and showed his simulation results together with measurements.
– S. Demiguel (SAGEM) focused on back-side illumination of CMOS imagers for low-light level, but the major part of his presentation was on a very nice overview of low-light level imaging options (tubes, EM, intensified, back-side illumination, other materials).
– P. Jerram (E2V) talked about 2 CMOS imagers that are back-side illuminated. Very nice talk with a lot of information on the BSI process itself.
– J. Bosiers (DALSA) highlighted their large CMOS tile of 77 mm x 145 mm, 3 sides buttable and intended for X-ray applications. During the talk, the BSI process of DALSA was described as well, based on back-side charging to passivate the back-side of the thinned sensors.
– P. Cemeli (Soitec) explained the back-side process in the case the starting material is SOI. Quite a bit of technology information was given and actually this talk together with the one from P. Jerram gave an excellent overview of the ins and outs of BSI on bulk silicon and on SOI.
– B. Dryer (E2V) presented first results on radiation damage introduced in 0.18um CMOS imagers. Nice results but more experiments will follow.
– Round table discussion : a panel of 8 people discussed the issues of getting access to CIS foundries for small volumes and/or for process changes. It was concluded that process changes are out of the question (except for some small changes in implantation dose) and that the scientific/space community is that much fragmented that higher volumes can never be reached. The only option left is to search for a common ground to increase the volumes. This can be done by putting all roadmaps of all agencies on the table and focus on a common interest for all devices. Otherwise the situation will not change …. and in times that the fabs are filled, the situation can only get worse.
Conclusion : interesting workshop, no registration fee, small group of people (100), good atmosphere, open discussions, no proceedings. Thanks to the organizers !
Albert, 10-12-2009.
Thank you very much for this great overview! It is good to see what I’ve missed (so that I can contact the speakers…)