Together with the speaker/presentater/instructor Christian Enz (EPFL), the final agenda for the Harvest Imaging Forum 2017 on “Noise in Analog Devices and Circuits” is defined. I am happy to share it with you :
| 9:00 – 9:15 | Introduction to the forum |
| 9:15 – 10:45 | Introduction, Random signals and noise, Main noise sources of circuit components, Noise models of basic components |
| 10:45 – 11:15 | Break |
| 11:15 – 12:45 | Noise Calculations in Circuits, Noise calculation in continuous-time (CT) circuits, Noise sampling |
| 12:45 – 14:00 | Lunch break |
| 14:00 – 15:30 | Noise calculation in switched-capacitor (SC) circuits, Noise simulation |
| 15:30 – 16:00 | Break |
| 16:00 – 17:30 | Trade-offs between Noise and Power Consumption, The simplified EKV MOS transistor model |
| 19:00 – 20:30 | Dinner |
| 9:00 – 10:30 | The simplified EKV MOS transistor model, The concept of inversion coefficient and the design methodology, Basic trade-offs in analog design |
| 10:30 – 11:00 | Break |
| 11:00 – 12:30 | Figures-of-merit (FoMs) as design guidelines, Key FoMs parameters extraction |
| 12:30 – 13:45 | Lunch break |
| 13:45 – 15:15 | Noise and Offset Reduction Techniques, Switch nonidealities, The Autozero (AZ) technique, The Chopper Stabilization (CS) technique, Recent trends in noise and offset reduction techniques |
| 15:15 – 15:45 | Break |
| 15:45 – 17:15 | Example of a Low-noise CMOS Imager, CMOS image sensors (CIS), Noise reduction in CIS, A sub 0.5erms noise VGA imager in standard CMOS, Future improvements |
| 17:15 – 17:30 | Closure of the forum |
Looks more than appealing !!
All further info about the Harvest Imaging Forum 2017 can be found here.
Albert, 25-11-2017.