{"id":1292,"date":"2014-02-12T14:38:41","date_gmt":"2014-02-12T14:38:41","guid":{"rendered":"http:\/\/harvestimaging.com\/blog\/?p=1292"},"modified":"2014-02-12T14:38:41","modified_gmt":"2014-02-12T14:38:41","slug":"international-solid-state-circuits-conference-2014","status":"publish","type":"post","link":"https:\/\/harvestimaging.com\/blog\/?p=1292","title":{"rendered":"International Solid-State Circuits Conference 2014"},"content":{"rendered":"

 <\/p>\n

The image sensors\u2019 harvest at the ISSCC 2014 was pretty weak this year.\u00a0 Only half of a session was devoted to imagers.\u00a0 In the past, 2 full sessions were filled with imager presentations \u2026<\/p>\n

Samsung presented their latest development in the field : a BSI-CMOS pixel with deep trench isolations\/separations and with a so-called vertical transfer gate.<\/p>\n

    \n
  1. The DTI is a very narrow, but very deep trench into the silicon.\u00a0 These trenches completely surround the individual pixels.\u00a0 Moreover they go through the complete sheet of silicon (after back-side thinned this is just a few microns).\u00a0 The trenches seem to completely eliminate the optical and electrical cross-talk in the silicon.\u00a0 CCM coefficients of devices without and devices with the DTI were shown, and the CCM of the DTI device comes much closer to the unity matrix.\u00a0 This results in a much better SNR after colour processing.\u00a0 The trenches seem to be filled with poly-silicon, which in its turn is isolated from the main silicon by an oxide.\u00a0 Although not confirmed by the speaker, it is expected that the poly-silicon gates are used to bias the silicon of the pixel into accumulation to lower the dark current.\u00a0 The dark current of the DTI pixel was equal to the dark current of the standard pixel without DTI.\n

    Because the pixels are 100 % isolated from each other, blooming is simply not possible.\u00a0 This is an extra advantage of the DTI structure.<\/li>\n

  2. The vertical transfer gate : the photodiode is not directly located at the silicon interface, but is buried into the silicon.\u00a0 Above it, the transfer gate is located as well as the FD node.\u00a0 So at the end of the exposure, the charges have to be transported upwards out of the diode into the FD node.\u00a0 This buried diode results in a remarkably high full well of 6200 electrons for a 1.12 um pixel with DTI.<\/li>\n<\/ol>\n

    According to the speaker, Samsung is ready for the next generation of pixels below 1 um.\u00a0 Two personal remarks :<\/p>\n

      \n
    1. I would love to see this pixel in combination with the light guide between the colour filters, presented by Panasonic a few years ago at IEDM.\u00a0 That should result in a device without spectral, optical and electrical cross-talk.<\/li>\n
    2. These devices are great masterpieces of integration in the 3rd<\/sup> dimension, and not that much silicon is left anymore.<\/li>\n<\/ol>\n

      There was also a nice presentation by Microsoft of their ToF device.\u00a0 They are using a non-conventional pixel : four toggling, small gates with wide open areas in between.\u00a0 At the \u201chead\u201d of the gates, the FD nodes are located.\u00a0 Pixels are being readout and processed in full differential mode and had the option to partly being reset during exposure.\u00a0 This removes the background illumination.<\/p>\n

      The circuitry around the pixels allows the pixels to run at :<\/p>\n

        \n
      • different shutter and different gain settings, resulting is an expanded dynamic range,<\/li>\n
      • multiple modulation frequencies, solving the conflict of precision and depth range,<\/li>\n
      • multi-phase operation, resulting in high accuracy and robustness.<\/li>\n<\/ul>\n

        The device realized has a depth accuracy of 0.5 % within a range of 0.8 m \u2026 4.2 m.<\/p>\n

        Albert.<\/p>\n

        February 12th<\/sup>, 2014.<\/p>\n","protected":false},"excerpt":{"rendered":"

          The image sensors\u2019 harvest at the ISSCC 2014 was pretty weak this year.\u00a0 Only half of a session was devoted to imagers.\u00a0 In the past, 2 full sessions were filled with imager presentations \u2026 Samsung presented their latest development in the field : a BSI-CMOS pixel with deep trench isolations\/separations and with a so-called […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-1292","post","type-post","status-publish","format-standard","hentry","category-uncategorized"],"_links":{"self":[{"href":"https:\/\/harvestimaging.com\/blog\/index.php?rest_route=\/wp\/v2\/posts\/1292","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/harvestimaging.com\/blog\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/harvestimaging.com\/blog\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/harvestimaging.com\/blog\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/harvestimaging.com\/blog\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1292"}],"version-history":[{"count":1,"href":"https:\/\/harvestimaging.com\/blog\/index.php?rest_route=\/wp\/v2\/posts\/1292\/revisions"}],"predecessor-version":[{"id":1293,"href":"https:\/\/harvestimaging.com\/blog\/index.php?rest_route=\/wp\/v2\/posts\/1292\/revisions\/1293"}],"wp:attachment":[{"href":"https:\/\/harvestimaging.com\/blog\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1292"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/harvestimaging.com\/blog\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1292"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/harvestimaging.com\/blog\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1292"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}