Archive for May, 2017

International Image Sensor Workshop (2)

Wednesday, May 31st, 2017

Some thoughts about day 2 :

  • two back-to-back papers of Dartmouth about the QIS.  The first paper described basically the work on a single Jot with reset-gate less pixel, with a tapered reset gate, with a JFET readout and with a buried channel readout, all fabricated in a stacked 45nm/65 nm BSI TSMC technology.  Some numbers : 1.1 um pixel pitch, 540 uV/electron conversion gain, best noise as low as 0.22 electrons.   The second paper talked about the integration of the Jots in an array.  The testdevice has 1 Mpixel.   The promise made : by 2019 they will show 100 Mpixel.
  • the largest SPAD array ever was reported by EPFL, while the smallest SPADs came from University of Edinburgh.
  • also the university of Edinburgh reported about the transformation of QIS bitplanes to compensate motion.  The paper was supported by spectucular images,
  • Delft University presented a SPAD integrated on a flexible substrate with the capability of being sensitive from both sides of the device,
  • a dedicated ToF session opened with a paper from Shizuoka University illustrating a 3-tap ToF sensor (normally 2-tap or 4-tap devices are shown),  also 3-taps in a paper of the University of Lyon in cooperation with ST and CEA-Leti.  The latter was made on a “doping-profile-controlled” epi-layer to enhance the transport of the electrons to the collection nodes,
  • several years ago Samsung presented material on RGB-Z sensors, also at the workshop they showed an alternative concept for a RGB-Z device based on structured light with a green laser beam.  The device included a simple trick to cope with a large amount of background light : using the FD-RST combination as a logarithmic pixel.
  • HDR was, is and remains a hot topic.  Apparently everyone is seeking a solution that does not suffer from motion artefacts.  This can be done by “playing” around with the gain of the output structure by adding an extra capacitor.  This idea can be found in the work of Brillnics (3 different conversion gains, 87 dB, 3.0 um pixel), ON Semi (extra in-pixel capacitor like LOFIC, 98 dB, 6 um pixel pitch), Caeleste (extra in-pixel capacitor in combination with extra gain in the columns, 92 dB, 12 um), ON semi (multiple reads of the PPD with storage on an external capacitor, 140 dB, 3 um pixel pitch), OmniVision (extra in-pixel capacitor, 120 dB, 2.8 um pixel pitch).  Apparently once the sensor does better than 120 dB, the sensor is no longer the limiting factor as far as DR is concerned,
  • “out-of-the-box” is the solution proposed by ST : detection, collection and readout of electrons as well as holes.  The electrons are collected in the classical way (FWCe = 33000), the holes are stored in the capacitances of the DTIs which has a very large total storage capacitance (FWCh = 750,000).  Result : 116 dB dynamic range in a 3.2 um pixel pitch,
  • between all the HDR stuff, Delft University presented a 0.5 electron noise device with correlated double sampling in the charge domain.  A conversion gain of over 1.5 mV/electron was reported measured on a device made in a standard 0.18 um CIS process,
  • Ritsumeikan University calculated the temporal resolution limit of silicon imagers.  The result is around 11 ps.  So still a long way to go before we reach the maximum frame rate corresponding to this limit, being 90 Gfps,
  • high-speed devices were presented by Tohoku University (based on burst mode with analog memories outside the active imaging area, 10 Mfps, 960 frames), Vrije Universiteit Brussel (burst mode based on in-pixel storage, 20 Mfps, 108 frames), Tokyo University ( 0.64 usec row-time), and AGH University of Krakow (70 kfps for a device with 75 um pixel pitch intended for XRD applications).

Sorry for any typos or for any missing papers, also day 2 had again a lot of information : 2 invited papers and 23 submitted papers !

Albert, 31-05-2017.

International Image Sensor Workshop (1)

Tuesday, May 30th, 2017

Some thoughts about day 1 :

  • Sony showed that they are ready for hybrid bonding on pixel level with a pitch of 2 um (on teststructures) and 4 um in a real imager with 1 um pixel pitch,
  • A collaboration between TSMC and Qualcomm illustrated a stacked image sensor on top of an FPGA,
  • According to Omnivision, the pixel race is picking up again.  This was illustrated by an imager with a pixel pitch of 0.9 um, with the same performance as the 1.0 um pixel,
  • Fermi Lab showed an very complex die-to-wafer-to-wafer structure,
  • TSMC realized a 4T pixel in which the charge transfer (underneath the transfer gate) is no longer taking place at the interface but deeper into the silicon.  Also this was demonstrated in a device with 0.9 um pixel pitch with an improved noise performance,
  • TechInsights give a great (historical) overview of PDAF pixels and stacking.  Although they tell what others are doing (or have been done), still a lot of interesting details were shown,
  • BAE illustrated that dark current is reduced over the years by a factor of 5000, and that we now have a temperature behaviour according the Eg-law, while in the past it was the Eg/2-behaviour.  Unfortunately (or maybe fortunately), still not all dark current secrets are yet revealed,
  • TowerJazz illustrated a pinned-storage node in a global shutter pixel with 2.8 um pixel pitch (is this global shutter CIS with 2.8 um seen elsewhere in a product of … ?)
  • Fluorine implant is used to lower the noise in a CIS, this was presented by Dongbu,
  • Random Telegraph Noise got quite a bit of attention, talks from TSMC and twice Tohoku University showed a lot of measurement results to further explain and understand the RTN effect,
  • On-chip near-IR filter for colour imaging was presented by VisEra.  This is an attractive alternative to the classical near-IR filter because it makes the height of the camera-module lower.

It is impossible to write about every single paper.  On day 1 there were 17 presentations plus 45 posters, an incredible amount of details and information.  But the good news is that all papers will become on-line (open access on in about 2 or 3 months from now.


Albert, 30-05-2017.

Announcement of the fifth Harvest Imaging Forum in December 2017

Tuesday, May 16th, 2017

Mark now already your agenda for the fifth Harvest Imaging Forum, scheduled for December 2017.

After the succesful gatherings in 2013, 2014, 2015 and 2016, I am happy to announce a next one.  Also this fifth Harvest Imaging Forum will be a high-level, technical, short course focusing on one particular hot topic in the field of solid-state imaging.  The audience will be strictly limited, just to stimulate as much as possible the interaction between the participants and speaker(s).

The subject of the fifth forum will be :

Low-Noise Analog CMOS Circuit Design : from devices to circuits”.

More information about the speaker and the agenda of the forum will follow in the coming days/weeks, but I wanted to share this announcement with you as early as possible to make sure you can keep your agenda free on these days (Dec. 7-8 or Dec. 11-12, 2017).


May 16th, 2017.


Tuesday, May 2nd, 2017

The webpage for the new Harvest Imaging project, related to reproducibilityvariability and reliability of CMOS image sensors is ready !

In this Harvest Imaging project the reproducibility, the variability and the reliability of the CMOS imagers will be analyzed :

  • Reproducibility : will give quantitative information about how well particular measurements and retrieved performance data do reproduce if the devices are measured over and over again by means of the same calibrated measurement equipment,
  • Variability : will give quantitative information about the spread of the performance data from sensor to sensor/from camera to camera,
  • Reliability : will give quantitative information about the stability of the sensor and camera performance over time.

The measurements are done on a higher-end, more expensive camera with a global shutter CMOS sensor and on a lower-end, cheaper camera with a rolling shutter CMOS sensor. The cameras will be thoroughly measured every 6 months over a period of 5 years.  The yearly reports about the measurement results will become available in the Summer of each calendar year (Summer ’17, Summer ’18, Summer ’19, Summer ’20 and Summer ’21). A customer can step into this project at any given time, but the earlier the more attractive the pricing of the report(s) will be.  Once a customer has stepped into the project, he/she will automatically receive all reports that are produced AFTER the date he/she stepped in.

For more information, please check out :

Albert, 2/5/2017.