“A 0.44 e rms read-noise 32fps 0.5 Mpixel high-sensitivity RG-less-pixel CMOS image sensor using bootstrapping reset” from Shizuoka University was presented by T. Wang. The device is using correlated multiple sampling (CMS) on column level in combination with a high conversion gain. The latter is obtained by reset gate-less pixel and a bootstrapping technique. The final result is a conversion gain of over 150 uV/electron. The reset-gate less pixel is not really new, this is already published by the same group at other conferences. By means of carefully designing the distance between the floating diffusion and the reset drain diode, the reset-gate less device can be operated. But in this paper the extra bootstrapping technique is added to allow a larger voltage swing of the pixel. Pictures of a scene illuminated at 0.1 lux were shown (after averaging 16 images !). Pixel size is 11.2 um, with a full well of 4100 electrons. The read noise is as low as 0.44 electrons rms. Despite of the low full well, still a dynamic range of 72.3 dB is mentioned.
The last paper in the imaging session was entitled “A 1ms high-speed vision chip with 3D stacked 140GOPS column-parallel PEs for spatio-temporal image processing” by T. Yamazaki of Sony. The device is really fully exploiting the capabilities of the 3D stacking. In the second layer of silicon a memory is included next to column level processing elements and the column level ADC. In this bottom silicon layer, filtering of the data can be done, as well as target detection, target tracking and feature extraction. The speed at which all operations are done is simply phenomenal. The imaging part is made in a 90 nm 1P4M process, the bottom part is made in a 40 nm 1P7M process. Pixel size is 3.5 um, full well is 19,800 electrons, random noise is 2.1 electrons, resulting in 80 dB dynamic range at 12 bits. As mentioned in the title, the processing in the spatio-temporal domain can be done at a speed of 1 ms.