Also this year Shizuoka University was present at the ISSCC with an imager paper. Mochizuki presented a single-shot 200 Mfps 5×3 Aperture Compressive CMOS Imager. The chip consists of 5 x 3 subarrays (multi-aperture), and each subarray has 64 x 108 pixels, each of 11.2 um x 5.6 um. The chip is fabricated in 0.11 um CIS technology. The 15 sub-arrays all receive the same image information, each sub-array has its own micro-lens. But the difference between the 15 sub-arrays is the exposure time. For each sub-array the exposure time is modulated/changed/scrambled in the time domain, such that all the different sub-arrays grab parts of the secenery but all in different and sometimes mixed time slots. In this way, the information readout is a kind of compressed information in the time domain. After solving/reconstructing, the 15 images shot at the same time (= NOT the same exposure time !) result in 32 different frames in the time domain. Thus the sensor has an inherent compression of 47 %.
As many other papers of Shizuoka University, also this paper is relying on a clever pixel design around a PPD, with a lot of knowledge in the device physiscs field. The paper described very nicely the principle of the compressed sensing, including simulation as well as measurement results.